Agenda

PhD Thesis Defence

• Tuesday, 15 September 2015
• 12:30-14:00
• Aula Senaatszaal

Thermal-Aware Design and Runtime Management of 3D Stacked Multiprocessors

This dissertation presents architectural techniques to enable the realization of efficient, high-performance chip multiprocessors, and facilitate runtime temperature management to ensure their dependable operation. Most importantly, it provides new insights into the complex thermal behaviour of 3D ICs, and illustrates how the design space of stacked die architectures can be effectively explored in order to maximize performance in the dark silicon era. This dissertation consists of two main themes, architecture and temperature.

The thesis addresses the following questions.

• How can the performance and efficiency of on-chip memory operations in multiprocessors be improved?
• How do the physical design parameters in Nagata?s equation affect the thermal behavior of 3D Integrated Circuits?
• How can the knowledge of thermal behaviour be effectively leveraged in the design of 3D stacked multiprocessors?
• How can the architecture and operating parameters be efficiently adapted at runtime to mitigate the severity of thermal issues, and improve execution performance?

Overview of PhD Thesis Defence