dr.ir. Nick van der MeijsAssociate Professor
Expertise: VLSI design verificationThemes: VLSI design verification
|Group:||Circuits and Systems (CAS)|
|Department of Microelectronics|
Nick van der Meijs received the M.Sc. Degree in Electrical Engineering (cum laude) from the Delft University of Technology in Delft, the Netherlands. In August 1985, he joined the Network Theory Section of the Department of Electrical Engineering at the Delft University of Technology, to work as a research assistant under the supervision of Prof. P.M. Dewilde. He has been an assistent professor since March 1, 1990, and an associate professor since August 1, 1998. In January 1992 he obtained his Ph.D. Degree in Electrical Engineering, the title of his thesis was "Accurate and Efficient Layout Extraction". In 1993 he received a Dfl. 2.000.000 "Pionier" (Pioneer) grant from the NWO (Netherlands Organization for Scientific Research) for research on physical modeling and verification of integrated circuits.
He has conducted research into various topics, including module generation, frameworks and physical design verification. He has contributed extensively to the design and implementation of the Nelsis/Ocean IC design system and the SPACE layout to circuit extractor. As an associate professor, he has designed and taught several courses from freshman to graduate level. Currently he teaches Introduction to Integrated Circuit Design, Circuit Theory (both freshman) and Introduction to Electronic Design Automation (undergrad). He is leading a group performing research on modeling and verification of parasitic effects in advanced integrated circuits.
His main professional interest is in the field of efficient (practical) algorithms for Electronic Design Automation and foremost in modeling and extraction of physical/electrical effects in large integrated circuits.
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Last updated: 19 Jul 2017